|
LPC2364, LPC2366, LPC2368, and LPC2378 device highlight
Introduction
 |
|
Key Features:
- 32-Bit ARM7® Core Architecture
- 72MHz operation (64 Dhrystone MIPs)
- Up to 512kB on-chip Flash and 58kB SRAM
- Ethernet 10/100 MAC with DMA
- USB 2.0 full-speed device with PHY and DMA
- CAN 2.0B with two channels
- General-purpose DMA controller
- I2S, three I2C, three SPI/SSP, and four UARTs
- 4MHz internal RC (IRC) oscillator trimmed to 1% accuracy
|
The LPC23xx series operates at 72MHz with up to 512KB of zero-wait state on-chip flash.
More significant is its ability to simultaneously run the application, USB FS, CAN, and Ethernet.
This is mainly achieved by the industry's only 2 AHB bus architecture in an ARM7-based MCU.
Products
Block Diagram
Comparison Table
| Product |
Flash |
Total SRAM |
External Bus |
CAN |
SD/MMC |
Package(s) |
| LPC2364 |
128kB |
34kB |
N |
2 |
N |
LQFP-100, TFBGA-100 |
| LPC2366 |
256kB |
58kB |
N |
2 |
N |
LQFP-100 |
| LPC2368 |
512kB |
58kB |
N |
2 |
Y |
LQFP-100, TFBGA-100 |
| LPC2378 |
512kB |
58kB |
MiniBus |
2 |
Y |
LQFP-144 |
LPC23xx Series MCUs
Click  for datasheet. Also, see datasheet disclaimer.  ,  ,  indicate product status. Click  or  for more or less detail.
 | LPC2364 |  | Microcontroller with 128KB flash, USB 2.0, 10/100 ethernet, I2S, real-time emulation, dual AHB bus architecture |
| |
 | LPC2366 |  | Microcontroller with 256KB flash, USB 2.0, 10/100 ethernet, I2S, real-time emulation, dual AHB bus architecture |
| |
 | LPC2368 |  | Microcontroller with 512KB flash, USB 2.0, 10/100 ethernet, SD/MMC, I2S, real-time emulation, dual AHB bus architecture |
| |
 | LPC2378 |  | Microcontroller with 512KB flash, USB 2.0, 10/100 ethernet, SD/MMC, I2S, real-time emulation, dual AHB bus architecture |
| |
Samples
Support
Demonstration and Evaluation Boards
Software
PHY
The NXP LPC23xx series Ethernet MAC is compatible with the following PHYs:
| Company |
PHY |
| National |
|
| Micrel |
KS8721 |
| SMSC |
LAN83C185 |
| TDK |
78Q2133 |
| Broadcom |
BCM5220 |
| Davicom |
DM9101 |
National's DP83848I 10/100 Ethernet PHY features:
- Robust, single-port Physical Layer device
- Optimized for real-time Ethernet performance
- Higher reliability due to reduced power dissipation
- Cable-length performance well above IEEE specifications
- Low external component count for easy interface with twisted-pair media
- Full support of JTAG (IEEE 1149.1) for simplified manufacturing
- Support for MII and RMII for design flexibility
Documents
More Information
Literature
Links
|
|
 | Standard ICs sections |  |
|
- Product families & functions
- Literature brochures, leaflets, presentations
- Packaging specs & SOT #s
- Support manuals, models, FAQ, software, demoboards, tools, training
- Quality handbook, markings
- Contact sales, distributors
|
|
 | |  |
|
|